Resume
RadiSys Corporation Hardware Engineer
June 2005 – Present
Hardware design engineer for PowerPC and Intel Architecture based Advanced Telecommunications Architecture (ATCA) products.
Skill set:
- Digital logic design
- High speed signal integrity (PCIe, SAS 3.0Gbps, XAUI, GbE, SerDes)
- Power supply design (discrete switching supplies and linear)
- Hardware verification.
- Extensive Tektronix high speed real-time and sampling scope operation, and application usage (RT-Eye, Ethernet Compliance, USB Compliance)
- PICMG ATCA 3.0, 3.1
- PICMG AMC.0, AMC.1, AMC.2, AMC.3
Tool set:
- Concept HDL
- Allegro Viewer
Language set:
- C, PERL, Shell scripting
- Verilog, VHDL
- PHP, mySQL, HTML, CSS
OS set:
Linux (Fedora, RHEL, CentOS) – administration and maintenance
Mentor Graphics SQA Engineering intern, Synthesis Group
2004
- Imported and wrote new VHDL and Verilog testcases for finite state machines (FSMs), multi-port RAMs and Multiplier Adder Circuit (MAC) tests targeted for Xilinx Virtex-4 and Altera Stratix II.
- Wrote Bourne Shell scripts to automate data extraction tasks from PrecisionRTL transcripts.
- Imported and benchmarked customer designs with previous builds of Precision to ensure product quality.
- Updated and maintained VHDL/Verilog testcases for PrecisionRTL software, ensuring proper function of HDL source before and after synthesis.